Semiconductor device having a metalized via hole
US5406125A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 15, 1993 |
| Grant date | Apr 11, 1995 |
| Priority date | — |
| Expiry date | Apr 15, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having a metalized via hole used when mounting and connecting semiconductor chips, such as microwave chips, digital chips, analog chips and the like, on a top portion of a metalized carrier substrate is described herein. Each chip includes electrical circuitry on a top portion thereof with the circuitry connected to one end of a transmission line. Another end of the transmission line is connected to a metalized via hole. The via hole passes from the top portion of the chip to a bottom portion of the chip. The chip when mounted on the substrate is positioned over the top portion of the substrate and lowered thereon either by hand or with a mechanical chip carrying device. The bottom portion of the metalized via hole is indexed over a top of one end of a transmission line on the top portion of the substrate with the indexing tolerance between the two interfacing surfaces in a range of 0.5 to 10 mils. The close tolerance of less than one mil and up to 10 mils or greater may vary depending on the frequency of the application. Also, the close tolerance of the connection allows for proper alignment and uniform impedance transition between the chip and the substrate…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.