Video amplifier circuit with gain and alignment control
US5406221A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 1993 |
| Grant date | Apr 11, 1995 |
| Priority date | — |
| Expiry date | Mar 31, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/45479
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The circuit comprises two substantially identical stages (8a, 8b). Each of these two stages (8a, 8b) respectively comprises an input point (10a, 10b) and an output point (11a, 11b) and is arranged to produce, at its output point (11a, 11b), a voltage having an adjustable mean value and variations which are amplified with respect to the variations in the voltage at its respective input point (10a, 10b) with a gain controlled by a gain control signal (Vcg1, Vcg2). The input point (10a) of the first stage (8a) is linked to a decoupling capacitor (30) receiving the input signal (Vin). The output point (11a) of the first stage (8a) supplies the output signal of the circuit (Vout). A comparator (40) is provided for slaving, to a reference voltage (Vref), the voltage at the output point (11b) of the second stage, as well as the mean value of the output signal (Vout).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.