Circuit for driving two power mosfets in a half-bridge configuration
US5408150A · kind A · utility
105Cited by
3References
53Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 22, 1993 |
| Grant date | Apr 18, 1995 |
| Priority date | — |
| Expiry date | Mar 22, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/6871
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A driver circuit and method for alternately driving first and second power transistors is provided. The driver circuit includes shoot-through reduction circuitry for monitoring the gate-to-source voltages of the two power transistors so as to inhibit the turning-ON of each power transistor until the gate-to-source voltage of the other power transistor has fallen to a voltage level indicative of the other transistor being OFF. Additionally, the driver circuit includes a circuit to prevent transient signals from said power transistors from affecting the operation of the driver circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.