Apparatus and method for emulation routine control transfer via host jump instruction creation and insertion
US5408622A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 23, 1993 |
| Grant date | Apr 18, 1995 |
| Priority date | — |
| Expiry date | Sep 23, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3017
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for emulation routine control transfer creates a jump host instruction (JHI) containing the address of a next emulation routine during the execution of a current emulation routine and outputs the JHI at the end of current emulation routine for transfer of host processor control. The apparatus preferably comprises: an emulated program counter (EPC), a summing means, a state machine, a pointer storage means, an opcode storage means, and a jump instruction circuit. The state machine is preferably coupled to control the loading of the EPC, the loading of the opcode storage means, the summing means, the pointer storage means and the operation of the jump instruction circuit. The pointer storage means is preferably coupled between the data bus and the jump instruction circuit. The state machine preferably issues commands on the control bus and directly to the summing means and the jump instruction circuit to prefetch the next emulation routine, create a jump instruction to the beginning of the next emulation routine and assert the jump instruction on the bus at the appropriate time to transfer directly from one emulation routine to the next using the single host jump instruc…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.