Circuit and method for detecting a failure in a microcomputer
US5408645A · kind A · utility
43Cited by
10References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 25, 1992 |
| Grant date | Apr 18, 1995 |
| Priority date | — |
| Expiry date | Jun 25, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0757
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit and method for detecting a failure in a microcomputer are disclosed in which a watch-dog timer monitors an internal state of the microcomputer at an internal node representing the internal state and an error detection signal used to inform the failure of the microcomputer is output when a particular internal state to be generated on the internal node within a predetermined period of time. Particularly, in a preferred embodiment where the internal node is an output portion of a microprogram memory, microinstructions are monitored which serves as control signals used within or externally to the microcomputer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.