Method and apparatus for extending the resolution of a sigma-delta type analog to digital converter
US5410310A · kind A · utility
11Cited by
12References
6Claims
0Family size
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Inventor
Key dates
| Filing date | Apr 4, 1994 |
| Grant date | Apr 25, 1995 |
| Priority date | — |
| Expiry date | Apr 4, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/54
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A sigma-delta technique is used to generate a digital representation of the incoming analog signal amplitude. The integration stage of the converter holds an analog error term relative to the ratio of an incoming analog input signal to a reference voltage. The incoming analog signal is disconnected at the end of the conversion. The error term is monitored through a comparator as charge packets are applied to the input of the integration stage. The number of charge packets needed to have the error term cross zero provides information which can be used to extend the resolution of the analog to digital converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.