Semiconductor memory device having memory cells including transistors and capacitors
US5410503A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 6, 1993 |
| Grant date | Apr 25, 1995 |
| Priority date | — |
| Expiry date | Dec 6, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device having memory cells including a transistor and a trench type capacitor which are formed on a semiconductor substrate to cooperate with each other to store information. The device includes a trench having a bottom made of a first insulator disposed on the semiconductor substrate and a sidewall made of an epitaxial semiconductor layer which is epitaxially grown on the semiconductor substrate in a substantially vertical direction around the first insulator. The capacitor comprises an impurity diffused layer formed on the sidewall of the trench, a second insulator layer formed over thee impurity diffused layer, and a conductive layer opposite of the impurity diffused layer via the second insulator layer, with the transistor formed on the epitaxial semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.