Methods for scan path debugging
US5410686A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 1, 1993 |
| Grant date | Apr 25, 1995 |
| Priority date | — |
| Expiry date | Nov 1, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/865
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A scan path debugger isolates and identifies hardware and software faults in a computer system containing scan path logic. A user can readily define what information is to be examined and in what format. The user can toggle between displaying information in data-aligned format or time-aligned format. The user may temporarily suspend control of the scan path debugger to allow the system to be controlled temporarily by a different, unrelated program. The user can check the operation of the system under different microcode files. The user can also save the complete logic state of the system under test, execute one or more scan path debugger instructions while observing the results, restore the saved state, execute the same or different instructions, and observe the results.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.