Method and apparatus for scan testing an array in a data processing system
US5414714A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 1992 |
| Grant date | May 9, 1995 |
| Priority date | — |
| Expiry date | Mar 26, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/32
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and apparatus for scan testing an array (20) in a data processing system (10). In one form, the present invention uses a scanning sense amplifier (22x) which can perform the three functions of a sense amplifier, a master test latch for scan testing, and a slave test latch for scan testing. Using one scanning sense amplifier (22x) to perform all three functions reduces the amount of circuitry required to scan test an array (20). The same stimulus is applied twice to the array (20); and half of the output data bits are scanned out during each application of the stimulus. One extra output data bit is also scanned out during each application of the stimulus. The end result is a reduction in the circuitry required to perform scan testing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.