Hybrid lock escalation and de-escalation protocols
US5414839A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 19, 1992 |
| Grant date | May 9, 1995 |
| Priority date | — |
| Expiry date | Jun 19, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S707/99938
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Requests for memory locks upon nodes in a multi-level resource hierarchy of a computer system are granted and denied by a hybrid escalation/de-escalation protocol that dynamically modifies the resource hierarchy so that lock escalation may restrict the extent of the hierarchy. Each of the leaf-level nodes, for example, is identified by a flag indicating whether or not it is possible to further refine a lock on the node by de-escalation. During escalation from a lower level of the hierarchy to a higher-level node, the flag for the higher-level node is set to restrict the extent of the hierarchy and to free-up memory previously allocated to descendants of the higher-level node. In a specific embodiment, the lock protocol attempts to place a strong lock at the highest possible node in the portion of the resource hierarchy including an object to be locked, and also records in memory a leaf node instance for the object. Another conflicting request, however, may cause de-escalation of the strong lock toward the leaf-levels of the hierarchy. Escalation of leaf-level locks is attempted just before the lock protocol would otherwise record a leaf node instance for an additional object. Lock …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.