Current mode sample-and-hold amplifier
US5418408A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 1994 |
| Grant date | May 23, 1995 |
| Priority date | — |
| Expiry date | Jan 7, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sample-and-hold amplifier in which the held signal is represented as a voltage across a capacitor, but all other signals are represented as currents. At a summing node, the input current and a feedback current are summed to produce a difference current. In the tracking mode, this difference current flows through a closed hold switch onto the input of an integrator. The integrator accumulates the difference current onto the hold capacitor, where it becomes the hold voltage. This hold voltage is converted into a feedback current by a first transconductance amplifier, to provide the negative feedback to the summing node. The hold voltage, which need not equal the input signal, is also applied to the input of a second transconductance amplifier, which provides an output current. The ratio of the two transconductance gains determines the gain accuracy and linearity of the current output. When the hold switch is opened, there is no longer a current path into the hold capacitor, and the output current remains where it was at the moment the switch was opened.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.