Method of writing into non-volatile semiconductor memory
US5418743A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 1993 |
| Grant date | May 23, 1995 |
| Priority date | — |
| Expiry date | Dec 6, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5634
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of using a non-volatile semiconductor memory comprising a plurality of row and column lines, a plurality of memory cells disposed at intersections of the row and column lines and a plurality of reference cells disposed on each of the row lines. Each memory cell includes an MOS transistor having a substrate, a spaced-apart drain and source formed on one surface of the substrate, a channel region between the drain and source and a lamination of a tunnel insulating film, a floating gate, an interlayer insulating film and a control gate formed in that order on the channel region. Each reference cell has the same electrical characteristic as the memory cell, with the method including: PA1 (1) when writing data into each of the memory cells: PA2 (a) presetting threshold voltages of the MOS transistor to correspond to at least three different data to be stored in each of the memory cells; and PA2 (b) applying to the control gate and the drain the MOS transistor included in a selected memory cell, respectively, a selected high voltage, and a voltage determined according to one of the preset threshold voltages corresponding to one of the at least three different data to be stored w…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.