Method of forming a contact for multi-level interconnects in an integrated circuit
US5420076A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 3, 1994 |
| Grant date | May 30, 1995 |
| Priority date | — |
| Expiry date | Jan 3, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76802
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A via opening (24) is formed within a semiconductor structure (10) in order to allow for the insertion of a contact to establish multi-level interconnects in an integrated circuit. The via opening (24) extends to a conductive layer (16) within the semiconductor structure (10). During the formation of the via opening (24), a residual layer (26) is created within the via opening (24) and on the exposed surface of the conductive layer (16). A dry plasma material is introduced at the semiconductor structure (10) to remove the residual layer (26) from the via opening (24) and the exposed surface of the conductive layer (16). After removal of the residual layer (26), a conductive material for establishing the contact for connection to the conductive layer (16) is inserted within the via opening (24).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.