Stacked board assembly for computing machines, including routing boards
US5420754A · kind A · utility
20Cited by
12References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 28, 1990 |
| Grant date | May 30, 1995 |
| Priority date | — |
| Expiry date | Sep 28, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K1/144
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system is described for arraying multi-device processing nodes in a 3-dimensional computing architecture and for flexibly connecting their ports. The topology of each processing node is of a fixed and constant physical geometry. The nodes may comprise a digital signal processor chip, a static RAM, and a communications and network controller. The nodes are mounted on boards. Selective connection of ports of each board to ports of another adjacent board is effected by a routing and spacer element having internal routing paths.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.