Method of manufacturing a circuit carrying substrate having coaxial via holes
US5421083A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 1994 |
| Grant date | Jun 6, 1995 |
| Priority date | — |
| Expiry date | Apr 1, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a circuit carrying substrate having one or more coaxial via holes. The center core or inner layer (330) of the circuit carrying substrate is a dielectric material that has a plated (339) through hole or via (335) coupling the two surfaces of the inner layer together. One side of the inner layer has a first metallization pattern (336) and the other side has a second metallization pattern (338) on it. The through hole is electrically conductive (339) and connects portions of the first and second metallization patterns. The plated through hole is filled with a dielectric material (340). A first dielectric layer (342) is formed on one side of the inner layer, and a second dielectric layer (344) is formed on the other side of the inner layer, so that the dielectric layers cover the first and second metallization patterns and the filled via hole. A third metallization pattern (350) is formed on the first dielectric layer, and a fourth metallization pattern (360) is formed on the second dielectric layer. A second via hole (370) is formed within the first via hole, substantially concentric to and electrically insulated from the first via hole, to electrically conn…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.