Low inductance bus bar arrangement for high power inverters
US5422440A · kind A · utility
70Cited by
16References
25Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 8, 1993 |
| Grant date | Jun 6, 1995 |
| Priority date | — |
| Expiry date | Jun 8, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K7/14329
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A low inductance bus bar arrangement suitable for industrial voltage levels, and for power applications contains two or more elongate electrical conducting bars having rounded edges. Strips of dielectric insulating material are located between two of the elongate electrical conducting bars. The conducting bars are oriented in substantially parallel relationship to one another with the dielectric insulating material having a height of the cross-section thereof substantially greater than the height of the cross-section of the conducting bars. The bus bar arrangement also provides low inductance to the connecting devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.