Low distortion CMOS switch system
US5422588A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 14, 1993 |
| Grant date | Jun 6, 1995 |
| Priority date | — |
| Expiry date | Jun 14, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/6872
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A low distortion CMOS switch system includes a plurality of N-channel and a plurality of P-channel transistors with their drain and source terminals connected in parallel for receiving an input signal to be switched; and a control circuit for providing a different positive drive voltage to the gate of each of the N-channel transistors and a different negative drive voltage to the gate of each of the P-channel transistors to produce substantially constant "on" resistance, R.sub.ON, throughout the range of the switched signal conducted through the drain and source terminals, and for providing the same negative drive voltage to the gate of each of the N channel transistors and the same positive drive voltage to the gate of each of the P channel transistors to turn off the transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.