Fuzzy logic controller with optimized storage organization
US5422979A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 1994 |
| Grant date | Jun 6, 1995 |
| Priority date | — |
| Expiry date | Mar 7, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S706/90
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a fuzzy logic controller, numbers (NI) for linguistic values of the input signal (I1) and first and further parts of input relevance functions (ZL, ZH) of the input signal (I1) can be stored per input signal (I1 . . . I4) in an input memory (I1MEM . . . I4MEM). The numbers for the linguistic values can be fed directly and via incrementing devices (INC1 . . . INC4) to a regulating decoder (RDEC) through a number multiplexer (MUX1a . . . MUX4a), the regulating decoder supplying addresses for a downstream output memory (OMEM). An output signal of the output memory (OMEM) can be fed directly and the first and further parts of the input relevance functions can be fed via relevance function multiplexers (MUX1b . . . MUX4b) to a minimum/maximum circuit (MINMAX). The fuzzy logic controller is distinguished in particular by a very low storage space requirement and is therefore suitable in particular for fuzzy logic controllers with on-chip memories.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.