Semiconductor device having low floating inductance
US5424579A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 1993 |
| Grant date | Jun 13, 1995 |
| Priority date | — |
| Expiry date | Jul 2, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A first composite substrate including an insulating substrate, a copper pattern, and a copper layer on opposite surfaces is mounted on a metal base plate. A second composite substrate and semiconductor chips are mounted on the first composite substrate and interconnected by wire bonding. The paths of current flowing in the wires and in a copper pattern of the second composite substrate are antiparallel to the paths of current flowing in respective corresponding portions of the first composite substrate. A semiconductor device is produced in which an increasing switching frequency does not increase a surge voltage generated in ON and OFF switching operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.