MOS semiconductor with LDD structure having gate electrode and side spacers of polysilicon with different impurity concentrations
US5426327A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 8, 1993 |
| Grant date | Jun 20, 1995 |
| Priority date | — |
| Expiry date | Sep 8, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/671
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A MOS-type semiconductor device having an LDD structure. The device includes a silicon substrate of a first conductivity type. An insulating film is formed on a main surface of the silicon substrate. A gate electrode made of polycrystalline silicon containing impurities at a first concentration is formed on the insulating film. Sidewall spacers made of polycrystalline silicon containing impurities at a second concentration different from the first concentration are formed at both sides of the gate electrode. Impurity diffusion layers are formed in the main surface of the semiconductor substrate at respective regions thereof where source and drain of the MOS-type semiconductor device are to be formed. Each of the impurity diffusion layers includes a low concentration diffusion layer disposed at a first portion of one of the regions and a high concentration diffusion layer disposed at a second portion other than the first portion of the one region. The first portion extends between a first end substantially corresponding to a side of the gate electrode contiguous with one of the sidewall spacers and a second end substantially corresponding to an outer side of the one sidewall spacer …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.