Pulse width modulator having controlled delay circuit
US5428321A · kind A · utility
20Cited by
2References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 25, 1994 |
| Grant date | Jun 27, 1995 |
| Priority date | — |
| Expiry date | Jul 25, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/05
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A pulse width modulation circuit apparatus of a digital type using a delay circuit and a decoder, which is provided with a delay control circuit for driving the reset-set type flip-flop of a last output stage and which provides the flip-flop with a mode determination function, whereby the range of the operation frequency is broadened, the generation of a blank pulse and offset pulse can be suppressed, and a higher precision gradation expression can be realized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.