System and method for verifying the integrity of data written to a memory
US5428630A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 1993 |
| Grant date | Jun 27, 1995 |
| Priority date | — |
| Expiry date | Jul 1, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for verifying the integrity of data written to a mass memory medium. A local memory is directed by local memory control logic to store a data block that is received from a host microprocessor and that is to be written to the mass memory medium. The data block comprises a sequence of data symbols. An ECC encoder encodes the stored data block with error correction data. The error correction data comprises a sequence of error correction symbols that are appended to the data symbols. The data and error correction symbols are stored in the mass memory and immediately retrieved. An ECC decoder receives the retrieved data and error correction symbols from the mass memory and the data and error correction symbols of the encoded data block from the encoder. In response, the decoder generates an error status signal when more than a predetermined threshold number of the retrieved data and error correction symbols are improperly stored in the mass memory. The local memory control logic receives the error status signal and generates in response a second error status signal. The host microprocessor receives the second error status signal and generates in response remedial act…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.