Patent · US Expired

Programmable application specific integrated circuit and logic cell therefor

US5430390A · kind A · utility

19Cited by
42References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 17, 1994
Grant dateJul 4, 1995
Priority date
Expiry dateMay 17, 2014

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/17792
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A field programmable gate array includes a programmable routing network, a programmable configuration network integrated with the programmable routing network; and a logic cell integrated with the programmable configuration network. The logic cell includes four two-input AND gates, two six-input AND gates, three multiplexers, and a delay flipflop. The logic cell is a powerful general purpose universal logic building block suitable for implementing most TTL and gate array macrolibrary functions. A considerable variety of functions are realizable with one cell delay, including combinational logic functions as wide as thirteen inputs, all boolean transfer functions for up to three inputs, and sequential flipflop functions such as T, JK and count with carry-in.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.