Fractal transform compression board
US5430812A · kind A · utility
40Cited by
7References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 18, 1994 |
| Grant date | Jul 4, 1995 |
| Priority date | — |
| Expiry date | May 18, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T9/001
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Digital image data compression apparatus includes a controller circuit for receiving digital image data and for processing the image data into blocks. The controller circuit supplies processed image data to a plurality of transform circuits and to a feeder circuit. The transform circuits receive data from the controller circuit and the feeder circuit, and provide parallel processing to compare blocks of image data and generate fractal transform values representing the image data in a compressed form.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.