Processor for uniform operations on respective series of successive data in respective parallel data streams
US5432724A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 2, 1993 |
| Grant date | Jul 11, 1995 |
| Priority date | — |
| Expiry date | Dec 2, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/544
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system for processing parallel first and second sequences of successive first and successive second data, respectively, includes a memory, having a memory input to receive the first and second data for storage; and an operating circuit coupled to a memory output of the memory to receive a predetermined number of selected ones of the stored first data or the predetermined number of selected ones of the stored second data supplied by the memory, and for operating thereon. The memory is operative to store the first and second data provided in parallel at the memory input as first and second fields of a single word, each word being retrievable upon a single access. The system includes a rearrangement circuit, connected between the memory output and the operating circuit for receiving particular words and for alternately and in parallel providing the predetermined number of successive first data and the predetermined number of successive second data to the operating circuit. The system is typically useful as stereo audio equipment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.