Packet switching system
US5432782A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 22, 1992 |
| Grant date | Jul 11, 1995 |
| Priority date | — |
| Expiry date | Jul 22, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/107
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In a packet switching system, a plurality of transmitting/receiving interfaces are connected to a single data bus and a clock bus. A clock source supplies clock pulses marking a repeating series of data transmitting time slots to all of the interfaces over the clock bus, each time slot in the series being assigned to a different one of the interfaces. Each interface assembles packet data and an address received from a terminal or office line for transmission over the data bus during the interval of its assigned time slot and receives packet data from the data bus. Each interface extracts packet data addressed to it for transmission to another terminal or office line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.