Method of producing a field effect transistor
US5434094A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 8, 1994 |
| Grant date | Jul 18, 1995 |
| Priority date | — |
| Expiry date | Apr 8, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/977
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
FET devices according to the invention are made by etching separation grooves and the via-holes from the front surface of the substrate. Thereafter, the thickness of the substrate is reduced from the rear surface to expose the plating in the via-holes and separation grooves. A rear surface electrode and a plated heat sink are sequentially deposited on the rear surface of the thinned substrate. The devices are divided from a wafer by etching and/or severing along the separation grooves and at opposed locations along the plated heat sink.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.