Output signal driver
US5434823A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 23, 1994 |
| Grant date | Jul 18, 1995 |
| Priority date | — |
| Expiry date | Aug 23, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/108
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An output signal driver is described in which a functional block 10, such as a random access memory, provides a data signal to one input of a multiplexer 26 and then via a buffer stage 24 to an output signal line 6. The other input of the multiplexer 26 receives a recirculated value from the output signal line 6. In operation, the buffer stage 24 is enabled as soon as the functional block 10 is enabled. A data valid signal dv indicating when the data signal from the functional block is ready for output is used to switch the multiplexer 26 from selecting the recirculated value to selecting the new data signal value. The output signal on the output signal line 6 is made to always have a defined state derived from the existing output signal level or, when it becomes available, the new data signal. Power wastage through the driving of spurious signals on the output signal line 6 is thus avoided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.