Patent · US Expired

Programmable logic array integrated circuits

US5436575A · kind A · utility

73Cited by
27References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 25, 1993
Grant dateJul 25, 1995
Priority date
Expiry dateAug 25, 2013

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/17704
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module with any other logic module. In addition, adjacent or nearby logic modules are connectable to one another for such special purposes as providing a carry chain between logic modules and/or for connecting two or more modules together to provide more complex logic functions without having to make use of the general interconnection network. Another network of so-called fast or universal conductors is provided for distributing widely used logic signals such as clock and clear signals throughout the circuit. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.