Programmable frequency timing generator with phase adjust
US5436628A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 13, 1993 |
| Grant date | Jul 25, 1995 |
| Priority date | — |
| Expiry date | Sep 13, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/025
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable timing generator for creating a clock signal of variable duty cycle and frequency with a phase adjustment capability. To perform phase adjustment, the invention includes a mechanism which allows a frequency "walking" or phase adjust to be inserted by just adding or subtracting one time constant into the high or low pulse at a certain time interval. In one embodiment, the invention uses two programable counters, with only one counter counting at a time. One counter counts the high phase of a generated output signal and the other counter counts the low phase of the output signal. The two counters, or a single multiplexed counter, allow the "count high" value to be changed while the "count low" value is being generated. The timing generator only creates outputs which change on rising clock edges of an input clock resulting in an output frequency which is directly related to the input clock. The input clock is divided by a value that can be either an integer or non integer value, with steps as small as 1/4. The output clock is therefore a certain number of integer clock periods high and a certain number of integer clock periods low.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.