Decimation circuit and method for filtering quantized signals while providing phase angle correction with a substantially linear phase response
US5436858A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 5, 1994 |
| Grant date | Jul 25, 1995 |
| Priority date | — |
| Expiry date | Apr 5, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/04
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A decimation circuit for filtering a stream of quantized electrical signals while providing phase angle correction and a substantially linear phase response over a predetermined passband range F.sub.B is provided. The stream of quantized electrical signals arrives at a predetermined rate F.sub.M from an oversampling delta-sigma modulator. The decimation circuit includes a decimation filter for filtering the stream of quantized electrical signals to provide a filtered output signal at an output ram F'.sub.S defined by F'.sub.S =F.sub.M /R wherein R is a positive integer. A phase corrector is coupled to the decimation filter to receive the filtered output signal and to correct the phase angle of the received filtered signal so as to provide an equalized phase angle at least over the predetermined range F.sub.B. The value for R is selected such that output rate F'.sub.S is sufficiently situated above bandpass range F.sub.B such that the phase corrector provides a desired substantially linear phase response over the passband range F.sub.B.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.