Yield surface modeling methodology
US5438527A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 1995 |
| Grant date | Aug 1, 1995 |
| Priority date | — |
| Expiry date | Feb 23, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for predicting yields for integrated circuit designs for given specification limits and process variations with respect to transistor parametric variations is based on a stastical analysis starting with response surface modeling techniques that relate desired circuit outcomes as a function of a set of defined independent variables. The response surfaces are converted to discrete C.sub.pk surfaces for all combinations of the independent variables. The C.sub.pk surfaces are next converted to discrete percent yield surfaces for each of the circuit outcomes which then are combined to provide a composite yield surface comprising all desired parametric operating points of the outcomes that may be used to predict the circuit yield.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.