Mutual exclusion for computer system
US5438677A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 17, 1992 |
| Grant date | Aug 1, 1995 |
| Priority date | — |
| Expiry date | Aug 17, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4818
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and apparatus of mutual exclusion for executing protected code in a computer system. If an interrupt occurs during the execution of protected code, then the computer system is reconfigured to exclude interrupts having a lower priority than the current exclusion level and the interrupt is either deferred (if it has a lower priority than the current dessired exclusion level) or serviced (if it has a priority higher than the current desked exclusion level). In some embodiments, for computer systems which use a programmable interrupt controller (PIC), the PIC is reprogrammed. In other systems using a software-controlled interrupt handling, the kernel of the operating system is informed of the change in exclusion level. In summary, the system is only configured to a new exclusion level if an interrupt actually occurs, and thus, the latency resulting from reconfiguration is not incurred if an interrupt is not generated during the execution of the protected code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.