Method of fabricating a thin-film transistor having an offset gate structure
US5439837A · kind A · utility
31Cited by
4References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 19, 1994 |
| Grant date | Aug 8, 1995 |
| Priority date | — |
| Expiry date | Dec 19, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0321
Abstract
Using a gate electrode formed on a semiconductor film as a mask, impurity ions are implanted into the semiconductor film. Thereafter, a photoresist film is formed on the substrate including the gate electrode. The photoresist film on the gate electrode is then exposed to light from a back side of the gate electrode. By this self-alignment method, a resist pattern narrower than the gate electrode is formed. Then, the gate electrode is narrowed through the etching thereof using the photoresist pattern as a mask, whereby an offset gate structure of a thin-film transistor is obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.