Method and apparatus for controlling a mixed voltage interface in a multivoltage system
US5440244A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 1993 |
| Grant date | Aug 8, 1995 |
| Priority date | — |
| Expiry date | Nov 8, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0018
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The design and implementation of a low power CMOS bi-directional I/O buffer that translates low voltage core logic level signals into the highest logic level signals to drive the final output stage which outputs a selectable logic level signal. The buffer further translates input signals of a variety of logic levels into low voltage core logic level signals. In either case, AC and DC power consumption is minimized in a mixed power supply environment that requires voltage translation to represent the proper binary logic levels. An multivoltage I/O buffer having multiple input-receiving NOR gates is also described. The NOR gates of the multivoltage I/O buffer having triggering levels optimized for differing core voltage levels. Also described is a host adapted system for interfacing between and removable peripheral card and a host computer. The host adaptor includes an integrated circuit employing the multivoltage bi-directional I/O buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.