Differential/coherent digital demodulator operating at multiple symbol points
US5440265A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 1994 |
| Grant date | Aug 8, 1995 |
| Priority date | — |
| Expiry date | Sep 14, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/046
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Symbols (18) of a burst (12) are sub-divided into symbol sections (20). Each symbol section (20) is sampled and converted into polar coordinates. A buffer bank (38) selectably delays the samples and replays a preamble (14). A demod bank (40) includes a coherent demod (58) and several differential demods (60). Each differential demod (60) processes its own stream of symbol sections (20). The differential demods (60) feed a preamble detector (66) and a symbol synchronization circuit (62). The symbol synchronization circuit (62) identifies the symbol section (20) which yields the smallest magnitude of frequency errors. This symbol section (20) is processed by the coherent demod (58) to acquire carrier phase and recover data. The coherent demod (58) is implemented in the phase domain so that only oscillation signal phase data need be generated in phase locked loops. Two phase locked loops (110, 112) operate in parallel but with initial reference phase offsets so that at least one of the two loops will not experience hang-up.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.