Modular memory for an image decoding system
US5442402A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 1993 |
| Grant date | Aug 15, 1995 |
| Priority date | — |
| Expiry date | Sep 23, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/61
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A high speed modular memory adapted for use in a decoding system of motion compensated prediction coded image data, comprises: 2.sup.N memory modules each comprising a two dimensional memory array with an address register for storing different pixels of a frame of the image data, wherein said N is a positive integer; a read/write signal generator for generating a read/write signal in response to a frame synchronization signal from the image data; an address generator for simultaneously generating a horizontal and a vertical addresses for each of the 2.sup.N memory modules in response to a motion vector separated into a horizontal motion vector and a vertical motion vector and the read/write control signal; a data bus for communicating the image data with the 2.sup.N memory modules; and an order changer which changes within the data bus positions of the data simultaneously read from the 2.sup.N memory modules within the data bus in response to the horizontal motion vector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.