Equalizer for data receiver apparatus
US5444739A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 1992 |
| Grant date | Aug 22, 1995 |
| Priority date | — |
| Expiry date | Aug 31, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In an equalizer including a plurality of delay elements, a plurality of weighting elements and an adder, the impulse response of a signal transmission channel is estimated to selectively switch over a plurality of selector switches associated with the inputs and outputs of the respective delay elements, thereby selectively changing the combination of the delay elements and the weighting elements transmitting an input signal from the channel to the adder and also changing the combination of the adder and a delay element feeding back the output of the discriminator to the adder. Thus, the number of required taps of the equalizer can be reduced, so that the power consumption and size of the equalizer can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.