Digital logic circuit for implementing fuzzy logic operators
US5446438A · kind A · utility
1Cited by
3References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 16, 1994 |
| Grant date | Aug 29, 1995 |
| Priority date | — |
| Expiry date | Mar 16, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S706/90
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to a multi-stage digital logic circuit in which, for example, it is possible to assign an output word (C0, . . . , C3) a minimum of two input words (A0, . . . , A3; B0, . . . , B3), and in which it is possible to form output bits (for example C3) having a high place value before output bits (for example C2, C1 or C0) having a lower place value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.