Semiconductor nonvolatile memory device
US5446690A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 1994 |
| Grant date | Aug 29, 1995 |
| Priority date | — |
| Expiry date | May 25, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor nonvolatile memory device in which the states of memory cells are determined with respect to each of all data lines in a nonvolatile memory device so as to perform control such as continuation and suspension of programming automatically. Memory cell arrays in which nonvolatile semiconductor memory cells are arranged in an array form, word lines W1 and W2 to which control gates of a plurality of memory cell groups (sectors) are connected in common and data lines to which drains of a plurality of memory cells are connected in common are included, and there are possessed of a precharging circuit, a data hold circuit having a sense amplifier function and a data latch function and a memory cell state detecting circuit for each of said data lines. Reprogramming is made at the same time with respect to memory cells (sector) connected to the same word line. During reprogramming operation, the state of memory cells is read out at the same time with all of the data lines, and continuation and suspension of the reprogramming operation are controlled in the device only based on the information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.