Variable length codeword packer
US5446916A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 1993 |
| Grant date | Aug 29, 1995 |
| Priority date | — |
| Expiry date | Mar 26, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/40
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A variable length codeword packer communicates codeword data in successive m-bit bytes. A binary sum is accumulated indicative of a total number of codeword bits received over time. A byte pointer is derived from at least one most significant bit of the binary sum. A bit pointer is derived from a plurality of least significant bits of the binary sum. A first data storage array has a plurality of m-bit first storage bytes and is responsive to the byte pointer for storing received codeword data in the first storage bytes. A second data storage array has a plurality of m-bit second storage bytes and is responsive to the byte and bit pointers for filling the second storage bytes with codeword data from the first data storage array. m-bit bytes of codeword data are output from each filled second storage byte to provide successive m-bit bytes of codeword data. The use of a multistage approach in packing variable length codewords substantially reduces the complexity as compared to single stage designs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.