Method and apparatus for digital to analog conversion using GaAs HI.sup.2 L
US5448238A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 30, 1993 |
| Grant date | Sep 5, 1995 |
| Priority date | — |
| Expiry date | Jun 30, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/785
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital to analog converter and method for conversion is provided that includes an R-2R resistor ladder network formed with a plurality of current bit switches in a GaAs HI.sup.2 L integrated circuit. Each bit switch and R-2R node in the ladder network is associated with a corresponding bit position in the binary signal input to the converter. An arrangement of bipolar transistors (Q1, Q4) and diodes (D2-D3) is included in each bit switch (100) that steers current through one of two alternate paths, based on the logic state of the binary input signal (i e., "high" or "low" state). For one logic state of the binary input signal, current flows through the switch from the output of the digital to analog converter (110). For the alternate signal state, current flow from the output of the digital to analog converter is blocked. Therefore, each bit switch (100) operates as a single-pole-double-throw current mode switch under the control of the binary input signal (Ai). An arrangement of bipolar transistors (Q2, Q4) and a diode (D1 ) is also included to limit voltage swings and compensate for switching transients, which speeds up the recovery time of the switch and increases the overall…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.