Memory stack with an integrated interconnect and mounting structure
US5448511A · kind A · utility
286Cited by
4References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 1, 1994 |
| Grant date | Sep 5, 1995 |
| Priority date | — |
| Expiry date | Jun 1, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A memory stack includes a flexible interconnect device having a plurality of rigid sections connected together by a plurality of flexible sections. Memory devices such as dice or chips are mounted on the flexible interconnect structure and the structure is folded to at the flexible sections to form a stack. Connections among memory device I/Os and interconnect device mounting contacts are made via traces in a signal layer. A thermal conduction layer can be added to increase heat conduction away from the memory devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.