Data flow processor with simultaneous data and instruction readout from memory for simultaneous processing of pairs of data packets in a copy operation
US5448745A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 3, 1993 |
| Grant date | Sep 5, 1995 |
| Priority date | — |
| Expiry date | Dec 3, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4494
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data pair detecting portion of a data flow type information processor outputs a data packet including a destination field and an instruction field and a data packet including two data fields. The data packet including the destination field and the instruction field is separated into a data packet including the destination filed and a data packet including the instruction field. The data packet including the destination field is applied to a program storing portion and the data packet including the instruction field is applied to an operation processing portion. The data packet including the two data fields is also applied to the operation processing portion. In a copy processing or in a constant reading processing, the program storing portion outputs a further data packet including a destination field and an instruction field or a data packet including a constant simultaneously with a data packet including a destination field and an instruction field. The operation processing portion outputs a data packet including a data field indicative of an operation result. The data packets output from the program storing portion and the data packet output from the operation processing porti…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.