Semiconductor integrated circuit devices including means for reducing noise generated by high frequency internal circuitry
US5449948A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 1991 |
| Grant date | Sep 12, 1995 |
| Priority date | — |
| Expiry date | Apr 1, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated circuit devices, chips and methods of making and operating them are disclosed. The devices are specially adapted for high frequency operation e.g. at or above 1 GHz. Inductive noise caused by switching at these frequencies--and which can interfere with switching--is inhibited by using a large bypass capacitor connected between power and ground connections outside the chip, and a small bypass capacitor connected between the same power and ground connections but formed inside the chip. The smaller capacitor cuts noise attributable to the wiring between the larger capacitor and the chip. The chip can have many of the smaller capacitors, even one or more per gate. In the preferred embodiments, the small capacitors from power and ground bonding pads are formed at the front surface of the chip substrate. Tantalum pentoxide, and other suitable dielectrics having relative dielectric constant of 10 or more at 1 GHz, are used to form the capacitors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.