Non-volatile semiconductor memory device detachable deterioration of memory cells
US5450354A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 1994 |
| Grant date | Sep 12, 1995 |
| Priority date | — |
| Expiry date | Apr 25, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/5642
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile semiconductor memory device capable of electrical programming including a plurality of memory cells, means for selecting at least one memory cell from the plurality of memory cells, mode setting means for setting one of a first read mode in which data written in the selected memory cell is read and a second read mode for detecting a change of the threshold voltage level of the selected memory cell, first comparing means for comparing a voltage signal read from the selected memory cell with at least a predetermined single first reference voltage level when the first read mode is set, first output means for producing a signal indicative of data written in the selected memory cell on the basis of the comparison in the first comparing means, second comparing means for comparing the cell voltage signal with at least a predetermined single second reference voltage level different from the first reference voltage level when the second read mode is set, and second output means for producing a signal indicative of a change of the threshold voltage of the selected memory cell on the basis of the comparison in the second comparing means.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.