Multi-channel image array buffer and switching network
US5450549A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 16, 1995 |
| Grant date | Sep 12, 1995 |
| Priority date | — |
| Expiry date | Feb 16, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N2201/329
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A multi-port buffer stores digitized image and/or audio information from a video camera and transfers the stored image information to a plurality of output channels. Digitized input data is passed through a crossbar switch and stored in a random access memory (RAM). The image data is retrieved from RAM and passed the crossbar switch to one of a plurality of first-in, first-out (FIFO) registers. Raster scan lines are passed from the FIFO registers to corresponding output channels. The order and rate of writing to RAM and reading out to the FIFO registers is controlled by an asynchronous queuing arbiter. If one of the output channels is slower than the others or operates at a variable clock speed, the asynchronous queuing arbiter changes the order in which the FIFO registers are filled to accommodate that output channel. Should one of the output channels fail, the bus request for the corresponding FIFO register is disabled, thereby skipping the failed channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.