Method and apparatus for preforming DCT and IDCT transforms on data signals with a preprocessor, a post-processor, and a controllable shuffle-exchange unit connected between the pre-processor and post-processor
US5452466A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 11, 1993 |
| Grant date | Sep 19, 1995 |
| Priority date | — |
| Expiry date | May 11, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T9/007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for implementing a discrete cosine transform (DCT) or an inverse DCT (IDCT) with a single hardware unit which applies only positive valued multiplicative coefficients and can be switched to either perform a DCT or an IDCT. The invention processes parallel input digital data signals to produce parallel output digital data signals which represent a discrete transform (either a DCT or an IDCT) of the input data. One aspect of the invention is a method and apparatus for performing discrete transforms using a multiplier which implements MSB-first, bit-serial, carry-save, multiplication of an input word by a positive fixed coefficient. In one class of embodiments, the serially received digits of the input word can take on positive values only. In other embodiments, the serially received digits of the input word can take on positive or negative values. Performance of MSB-first carry-save multiplication allows the design of extremely efficient transforming hardware having low processing delay and high precision, and supporting medium to low speed transform rates. Another aspect of the invention is a method and apparatus for performing discrete transforms using a butt…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.