General absolute value circuit
US5453783A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 2, 1992 |
| Grant date | Sep 26, 1995 |
| Priority date | — |
| Expiry date | Sep 2, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/75
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A general absolute value circuit for developing a true, symmetric or bipolar, absolute value output signal from an input charge signal, compact enough to be used on a sensor chip incorporated into (or used in combination with) a pixel processor of the type used in imaging and other systems that collect electromagnetic radiation as part of on-chip circuitry, includes a balanced differential amplifier combined with a merged dual shelf transistor structure. The balanced differential amplifier, in response to an input charge signal, drives the merged dual shelf transistor structure which in turn generates the desired true absolute value output signal. Such circuitry may be used in imaging systems to implement focal-plane processing algorithms or may be used for performing a single read true absolute value computation by a pixel processor located on a sensor chip. The merged dual shelf transistor structure enhances performance and speed of the processor in which it is incorporated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.