Technique for accomplishing deadlock free routing through a multi-stage cross-point packet switch
US5453978A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 1994 |
| Grant date | Sep 26, 1995 |
| Priority date | — |
| Expiry date | Apr 4, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Apparatus and an accompanying method for establishing deadlock-free routing in a large bi-directional multi-stage inter-connected cross-point based packet switch, particularly, though not exclusively, that employed within a high speed packet network of a massively parallel processing system (400). Specifically, in selecting routes for inclusion within route tables (320, 360, 380) contained within the system, the entire network is effectively partitioned such that certain routes would be prohibited in order to isolate packet traffic that would flow solely between nodes in one partition, e.g. system half (503), of the system from packet traffic that would flow between nodes in the other partition, e.g. another system half (507). In that regard, to pick routes for packets that are to transit between nodes situated in a common partition of the system, those routes that contain a path(s) (524, 544) passing through the other system partition would be prohibited. No such route prohibition would occur in selecting a route that is to carry a packet between nodes in multiple system partitions, e.g. between different halves of the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.